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Key Technology Research On Dual-mode Demodulator Of DVB-T/DTMB

Posted on:2010-11-09Degree:DoctorType:Dissertation
Country:ChinaCandidate:X J LiFull Text:PDF
GTID:1118360275993821Subject:Microelectronics and Solid State Electronics
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With the development of the technology,the peoples' life will be deeply affected since the globe is stepping into a whole new era of digital TV broadcasting.The China government issued the standard of digital terrestrial broadcasting which adopts TDS-OFDM in Augest 2006,and also declared to plan to shut down the analog television broadcasting completely and realize the national digital television service by 2015.In addition to China's DTMB,there are other three famous digital television standards,including American ATSC,Europen DVB-T and Japanese ISDB-T.DVB-T is most accepted by over thrity countries and regions all around the world.Now many DVB-T and DVB-T/H demodulator chips have been developed by foreign companies. In China,Tsinghua Legend Silicon Corp.has already developed the DTMB demodulator chip.From the point of digital TV development,dual-mode demodulator chip will become a necessary trend,which satisfyies DVB-T and DTMB.Utill now, most dual-mode demodulator chips are made of straight forward integration instead of detail optimization.According to the investagation,we can find that few attentions have been paid on the research of dual mode demodulator chip.With difference from the existed dual-mode solutions,this paper focuses on a novel dual-mode inner demodulator solution to achieve lower complexity and lower power using algorithm improvement,circuit optimization and effective hardware sharing,which includes digital baseband,dual mode sychronization and dual mode FFT processor.The main reseach of this paper includes the following parts.(1)Based on the investigation of the digital TV technology development,the DVB-T and DTMB modulator and their demodulator architecture,wireless channel model,requirement to synchronization and their effect have been detailedly discussed. Dual mode inner demodulator architecture with lower complexity and lower power has been proposed.(2)A baseband system and its detailed circuits compatible for DVB-T and DTMB receiver have been proposed.The Forraw interpolator has been designd.In addition, two novel DDFS have been invented.The first is a memory-reduced DDFS for OFDM system,which only requires 192 bit ROM much less than tranditional DDFSs. The other is based on two segment fourth-order parabolic approximation,its SFDR is about 90dBc and frequency is up to 200MHz. (3)The synchronization algorithms and its circuits of DVB-T and DTMB receivers,which include symbol offset,carrier frequency offset and sampling frequency offset,have been optimized and realized.After the analysis of existed ML algorithm,a low complexity sign ML detector for OFDM systems has been proposed. Contrasted with conventional algorithms,88%chip area and 93%power consumption have been saved respectively.Moreover,a novel integer carrier frequency offset estimator,which uses shorten correlation value instead of whole word,is also discussed.The 52%complexity and 62%power consumption can be optimized without sacrificing any performance,compared with conventional architecture.The parameters K and P of Tufvsson's algorithm have been investigated in detail,and then a two-step synchronization scheme is proposed.In addition to symbol and frequency synchronization,the estimation algorithm and circuits of sampling frequency offset has also been disccused.Finally,the dual mode synchronization scheme and architecture have been proposed and optimized according to sharing the hardware resources.(4)A low power and small area 2K/8K FFT processor for DVB-T receiver has been proposed,it saves 64%power consumption and 35%chip area contrasted to Su's method.The design of 3780 porint FFT processor for DTMB has also been achieved with the same whole architecture as the proposed for DVB-T.Additionally,the architecture of compatible mixed-radix 2/4,WFTA7/9/3/5/4 and system control scheme for dual-mode FFT processor have been given.(5)The test platerform for digital TV demodulator based on FPGA has been designed.Parts of the designed circuits have been embedded into the FPGA,and their function and some performace have been tested by using the TS signals generated by SFU of R&S.The results show that the proposed algorithms and circuits can meet the requirement of the specification.The researches of this paper are benefited to have the key technology of the digital TV demodulation,and increase our competition ability on OFDM and digital TV broadcasting.
Keywords/Search Tags:Digital Television Broadcasting, OFDM, DVB-T, DTMB, FFT, OFDM Synchronization, VLSI, TDS-OFDM, Maximum-Likelihood (ML) Correlation, Digital Baseband, direct digital frequency synthesizer, Carrier Frequency Offset, Sampling Frequency Offset, Low Power
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