| Digital Television Terrestrial Broadcasting is recently one of hot areas in wireless domain.It represents the developing precursor of broadband digital communication, breeds a opportunity to create a new market for mobile TV, and has bright future. GB20600-2006, the standard of the Chinese DTTB (digital terrestrial televisionbroadcasting) has been promulgated on Aug.30, 2006. Single-carrier and OFDM are merged in this standard. And this standard characterizes by exellent system performance, high utilization ratio of frequency, strong flexibility and etc, capable of adapting to different applications in both urban and rural areas.This dissertation depends on the project of chip of DTMB DTV receivers. The FPGA implementation of the equalizer for single-carrier and multicarrier of the standard has been completed in this thesis. This part is the important component of the receiver of single-carrier and multicarrier. Equalization in frequency domain and decision feedback in time domain is used for the single-carrier and multicarrier equalizer. After finishing the C program of the equalizer, the Verilog program has been designed based on the algorithm. And then, the function and timing simulations have been done. Finally, the hardware debugging on the hardware-platfom.In this dissertation, the develoing status of DTV all over the world is introduced firstly, details the characteristics of single-carrier and multicarrier in DTMB. And then the algorithm of equalization in frequency domain and decision feedback in time domain are introduced , and a enhanced realization scheme of DTMB is given in Chapter 2. The algorithm and realization of the FPGA design is introduced emphatically in Chapter 3. In the end the auther makers a summary and expectation of this dissertation. The main work described in this thesis is listed as follows:1.Design the C program of the equalizer.2.Design the Verilog program of the equalizer.3.Debug the Verilog program of the equalizer on the hardware platform. |
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