The Fpga High-speed Automatic Test System Based On Pxi Platform Design

As the scale and the complexity of FPGA are improving, the test of FPGA is becoming moe and more complex. Generally, in order to test the interconnect CLB and BRAM of FPGA completely, there are usually hundreds of patterns to be needed. The traditional ATE platform can provide the high speed test and many digital channels, but it is too expensive and consumes much power.The PC platform can generate and acquire the data to test the FPGA by accessing JTAG chain. But the clock rate can only be6MHz at most,which can not meet the requires of high speed test and costs much time.At the same time, it can not test the pins of the FPGA. Therefore,to design a high speed automatic test system which adapts to test FPGA well is the topic of this paper.In this paper, we devise a well-designed hardware structure to realize the high speed automatic test of FPGA based on the PXI platform with the use of LabVIEW, which is a kind of novel graphic programming language.The PXI-6542provide32bits high speed digital channels. The frequency of the sample clock can reach up to100MHz,which makes the high speed test possible. With the self-defined file format,programming in LabVIEW accomplishes the work of preparing the data to be generated,storing the data to be acquired and driving the PXI-6542to generate an acquire the data.The Simi-JTAG chain structure helps to expand the32bits high speed digital channels to cover all of the pins of the FPGA under test and change the attributes of input and output dynamically.The14chains work parallelly can speed up the configure of registers in Simi-JTAG chain.After all the design work, the successful test of FDP3P30proves the PXI platform automatic test system is feasible.The test results shows that the high speed automatic test system achieve the high test of the FPGA through the pins with low cost.And at the same time the total test time is only53percentages of the time used on the PC platform.