Research And Design Of High Speed, High Accuracy DAC In0.18μm CMOS Technology

As a very important interface component between digital system and analog system,Digital-to-Analog Converter (DAC) has been widely used in digital computer, moderncommunication system, aerospace, signal processing and many other fields. And it is one key factorof restricting the quality and performance of the entire electronic system.First, advantages and disadvantages of three conventional architectures of DAC are analyzedand compared in this thesis. The current-steering architecture is chose to meet the systemrequirements of high-speed. Based on the comparision among different decode modes, therelationship between performance and area versus percentage of segmentation, a “6+4” segmentedarchitecture, i.e. thermometer code weighed in6MSBS and binary-weighted in4LSBS, is used inthe design. Using the DAC high-level model, the impact of the nonideal factors, such as currentmismatch and finite output impedance of the current source, on the DAC performance is analyzedin detail. The conclusions based on the above dissuasions are used to optimize and design therelated circuit modules in DAC. In addition, the thesis also investigates the clock feedthrough effectand the key points in design of the current source switch unit.Current mode structure is used in the bandgap circuit with low temperature coefficient andhigh PSRR to operate in low supply voltage. The Cascode current source biased module withimpedance-up circuit results in a wide swing and a very high output impedance. The glitchamplitude is reduced and the dynamic performance is improved by the connection between thevoltage-limited circuit and the latch unit. Finally, the layout of the key module in the circuit isdesign and a test circuit board for the bandgap circuit is fabricated.Based on the SMIC0.18μm CMOS design process, both the schematic and layout are designed.The simulation result shows under1.8V supply voltage, the10bit DAC with100MSPS clock ratecan deliver up to8mA full-scale current into a50Ω load. The differential non-linearity (DNL) andintegral non-linearity (INL) is better than±0.1LSB and±0.4LSB respectively. Spurious-FreeDynamic Range (SFDR) is more than52dB.