Design And Implementation Of E1 Over Ethernet Adapter Base On FPGA

E1 is a basic interface of traditional telecommunication network,has been widely used in civilian and military fields,there are quite a few existing equipments using E1 as their interconnection interface standard.While Ethernet is the foundation of computer network access.There are still a lot of application requirements in realization of interconnection between these two kinds of network in the existing network equipment.Because there are no special integrated chips to realize this conversion,so the connectivity of E1 and Ethernet which is researched and expatiated on this thesis has great application value and practical significance.According to the demands of the connectivity of these two kinds of network,this thesis proposes a E1 and Ethernet adapter,which is using the SOPC platform based on FPGA,can transmit data between E1 and Ethernet.The adapter realized E1 data interface through a custom hardware circuit and FPGA logic,to complete the function such as HDB3 coder and decoder/clock recover /E1 framer and deframer,which are specified by E1 frame format.NiosII processor is used to control the Ethernet interface chip DM9000 B,and running UDP protocol stack in it.In FPGA there also realized the HDLC protocol.The technical scheme proposed in this thesis,using FPGA as the system hardware architecture,make full use of NiosII soft core processor capabilities,and using the general real-time operating system,uC/OS-II,ensure that the design can run efficient and stable.The adapter’s hardware and software design are verifed by the experiment.All the components in the adapter are industrial grade,can be use in harsh environments,would be suitable for the important communication equipment in civil,industrial and military fields.