Four Channel2Gsps Data Acquisition, Storage System Design And Implementation

Digital oscilloscope is a kind of high-performance oscilloscope based on datacollection, A/D conversion, software programming and other series of technology.Inrecent years, domestic digital oscilloscope has made rapid development,and thehighest sampling rate has reached2Gsps. But digital oscilloscope of higher samplingrate hasn’t appear, the basic reason is that the core device---high-speed digitalconverter (ADC) is difficult to obtain. Taking use of multi-channel parallel samplingtechnology is a way to achieve the higher sampling rate by ADC of more pieces and alow sampling rate. Based on domestic ADC chip, multi-channel parallel samplingtechnology can be used to achieve higher sampling rate of digital oscilloscope system,get rid of the dependence on foreign high-speed ADC in a certain range, reduce thecost of system, and to improve the competitiveness of domestic oscilloscope. Inaddition, even the foreign ADC chip can’t achieve the sampling rate of dozens ofGsps, because the ADC chip development process of higher speed is restricted bytechnology and other aspects, the development level of itself. Therefore,multi-channel parallel sampling technology is an effective way to realize higher speedand higher resolution by using ADC of lower speed, and it can get rid of therestriction of the ADC chip in some degree. Multi-channel parallel samplingtechnology to achieve high sampling rate system has its important practicalsignificance and necessity.This paper firstly studies the excellent research achievements of domesticparallel sampling technology, analyzes the technical characteristics of parallelsampling technology and its application in the future, and proves the feasibility andnecessity the parallel sampling technology.Then, this paper collects and studies somedesign cases of the high-speed data acquisition storage system, and on the basis of thecases designs the hardware platform of data collection and storage system, whose corecontrolling and processing unit is FPGA chip with high-speed transmission ability andconcurrent execution ability. What is more, using the parallel alternate sampling ofADC chip of more pieces can finish the acquisition, process and storage of high speeddata. This paper not only gives opinions of the design of hardware platform, also draws the hardware platform principle chart and PCB for reference aimming at thecharacteristics of the high speed&multi-layer digital circuits. Secondly, this papermainly introduces and analyses the principle of parallel sampling technology, kinds ofthe errors between channels and their separate causes and elimination measures. Onthis basis, this article designs the filter of four channels with high speed dataacquisition and storage system,and through the simulation program proves thevalidity of the filter. Then, this paper designs the logical structures of the corecontrolling and processing unit---FPGA chip, and gives the corresponding programcode.Finally, the article carries out the function simulation to the FPGA’s logic, thesimulation result proves the effectiveness of logic.Through the work, this paper completes the multi-channel high speed dataacquisition, storage, analysis and design of the system, and by means of simulationproves that the design is effective, for the future design provides a theoretical andpractical reference.