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Design Of A12Bit Capacitive Successive Approximation Adc

Posted on:2010-12-26Degree:MasterType:Thesis
Country:ChinaCandidate:L FanFull Text:PDF
GTID:2248330392951670Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In this paper, a12bit SAR ADC based on the TSMC0.18m1P6Mprocess has been designed. The whole circuit includes analog circuit whichcontains DAC circuit, comparator circuit, Bandgap reference circuit,accessorial circuit and digital circuit which contains clk circuit, shift registercontrol circuit.In the design of a digital to analog converter, the structure ofconventional digital to analog converter has been improved. This designtakes the structure of a segmented binary capacitor arrary and embedssampling capacitor into this capacitor arrary to ensure the accuracy ofconversion effectively and save the chip area. At the same time, this designuses bottom sampling technique to overcome the charge injection effect andthe clock feed-through effect.In the design of capacitor arrary, it uses the Parallel unit’s method toreduce the mismatch error of the MIM capacitance value,and adopts awhole concentric layout to improve match accuracy. In the design of acomparator, this paper proposes a structure of3pre-amplifiers and a latch. Inthe part of3pre-amplifiers, this paper uses PMOS transisitores as inputtransisitores and adopts cascade structure as input stage to reduce1/f noise,kickback noise and eliminate the body effect. In the part of a latch, this paper designs a structure of latch which separates sampling mode and latchmode and reduces the kickback noise. An offset cancellation technique isapplied too. Simulation results show that, the proposed comparator candistinguish0.2mV input at1MHz, while its power is750uW.In the design of a bandgap reference circuit, the structure ofconventional bandgap reference circuit has been improved. Folded-cascadearchitecture is used for the operational amplifier in the bandgap referencecircuit, and this kind of amplifier has a high voltage gain and goodhigh-frequency power-supply rejuction ratios which can ensure the stabilityof the circuit. This paper uses Monte Carlo analytical method to simulate1000times in TSMC0.18m1P6M process. Simulation results show that,the variational range of the proposed bandgap reference circuit is only0.3mV, and the design of bandgap reference circuit is perfect.In the design of digital circuit, digital circuit transforms serial outputinto parallel output. Then, this paper designs accessorial circuit to achievethe whole SAR ADC. At last, the layout of SAR ADC has been achievedusing TSMC0.18mtechnology.This SAR ADC adopts single mode, and include analog circuit whichworks in3.3V and digital circuit which works in1.8V. Its precision is12bits,sampling rate is1Msps. The simulation results show that the design of SARADC has achieved the requirements.
Keywords/Search Tags:Successive approximation register ADC, Charge scalingDAC, Preamplifier-latch comparator, Bandgap references
PDF Full Text Request
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