Design Of A 16 Bit Successive Approximation ADC

With the development of circuit design coming into the SOC stage, analog and digital modules must be integrated to implement the function of system. But signals in real world generally are analog signals .Therefore, analog-to-digital converters (ADCs) become key blocks in the mixed signal system.Different types of ADC have their own characteristics. Owning to the properties of low power consumption and a small area, the successive approximation register (SAR) ADCs are commonly used for medium-to-high resolution applications such as portable/battery powered instruments, pen digitizers and touch screen controllers. In this work, a 16 bit SAR ADC was designed.To possess the features of fast 16 bit high resolution,- 10V～+10V input range, 100mW max power dissipation, high speed parallel interface etc, new structure of coupling capacitances was adopt to work as ADC's core module DAC,cause traditional algorithm and structure cannot get the high-precision. Some special designs were also made to realize both high-precision and low power consumption. Charge redistribution technique was employed and a 2.5V bandgap reference, accurate clock were integrated on chip. Compared with many types of reference, at last bandgap reference was used, considering to its best TC and PSRR. A buffer was arranged to follow the reference to increase the load capacity and insulate the noise from the digital circuits. To ensure the clock with the accurate frequency of 5 MHz and duty ratio of 1:1, self detector was added to the clock circuit. Through the state...