The Design Of RF SoC In Internet Of Things

The Internet of Things is a new information technology, and also is one of the national top five emerging industries. The hardware devices of internet of things can not work without wireless transceiver, while frequency synthesizer is one of the most critical components for wireless transceiver. The performance of frequency synthesizer will directly affect the performance of wireless transceiver. The main work of this thesis is to study the design of2.4GHz ISM band frequency synthesizer.Based on the structure of charge-pump phase-locked loop, the frequency synthesizer that frequency range from2.4GHz to2.48GHz in SMIC0.18um1P6M CMOS technology is proposed. The module structure of PLL frequency synthesizer, such as voltage controlled oscillator, charge pump, phase frequency detector and divider, is chosen firstly, the loop characteristics and parameters are analyzed, and the Verilog-A model of PLL frequency synthesizers is established in this paper. Then the circuit structures and parameters of each module is designed, the reference frequency of the crystal is8MHz; the structure of VCO is LC negative resistance oscillator with filtering technique, the CP uses a rail-to-rail operational amplifier as the error amplifier, the passive third-order low-pass filter can filter the spurs on control voltage, the integer frequency divider uses CML prescaler,4/5dual-modulus prescaler, Pulse-Swallow programmable counter; the fractional frequency divider adds a Σ-Δ modulator of third-order MASH1-1-1structure. Cadence Spectre and AMS are used to simulate analog parts and digital parts respectively. The simulation results of VCO show-123.4dBc/Hz@1MHz,-103.0dBc/Hz@100KHz,-80.84dBc/Hz@10KHz. The optimal design of VCO from oscillation amplitude and filtering is further analyzed. Finally, design of layout and post-layout simulation are presented in this paper. The lock time of frequency synthesizer is less then20us and reference spur is less then-70dBc.The power consumption is less than l5mW. The area of layout is600umx800um.