Study And Implementation Of RapidIO High Speed Serial Bus

The fast development of avionics raises a higher requirement for avionics bus interconnect technology. With the character of great speed and efficiency, RapidIO interconnect bus satisfies the high need that new-generation avionics system require, and becomes research object of the paper.RapidIO is a new type of high-performance and low pin-count interconnection architecture based on packet switching, and it is an open interconnect technology standard which is designed to meet present and future demand for high-performance embedded system. RapidIO can address the needs of a wide variety of embedded system application which include interconnecting microprocessor, and memory mapped I/O devices in networking equipment, storage subsystems, and general purpose computing platforms. It allows chip-to-chip and board-to-board communications with communication bandwidth ranging from 1 to 60 Gbit/s transmission speed, providing interconnecting resolvent of high-bandwidth and low-lantency for embedded system design.First of all, the serial RapidIO technology is in-depth researched in this thesis and the three architecture layers which contains physical layer, transport layer, logical layer are detailed analyzed, and then some problems about maintenance and error management is discussed. Then the paper designs a framework of RapidIO interconnect system, working out the hardware layer and the software layer separately. In the hardware layer, chooses Freescale’s MPC8641D and Tundra’s Tsi578 Switch to compose RapidIO interconnect system. In the software layer, designs the RapidIO basic driver of driver layer and communication between multiprocessors of middleware layer which baseing on the software environment of embedded real-time operating system VxWorks and its exploitable tool Tornado2.2. In the middleware layer, carries out reliable message transport mechanism and unreliable bulk data transport mechanism, implementing network function of RapidIO interconnect system, forming RapidIO system interconnection. Finally, the paper certificates RapidIO bus’feasibility and low-latency, high-bandwidth characteristics in the communications function test and performance tests about two guideline of latency and bandwidth.