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AMBA-SRIO Bridge Design And Implement Of RapidIO Interface On FT-DSPx

Posted on:2014-11-17Degree:MasterType:Thesis
Country:ChinaCandidate:X H LiFull Text:PDF
GTID:2298330422974192Subject:Software engineering
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With the rapid development of large-scale integrated circuits, digital signalprocessor performance continues to improve, now it is toward the direction ofdevelopment of nuclear. But the bus transmission performance growth is far behind,this case has made that the transfer capability of system interconnect become one of thebottlenecks to improve system performance. With the development of technology andmarketing, the International Organization for Standardization (ISO) and theInternational Electrotechnical Commission (IEC) launched specifically for theembedded system interconnection international standards in2003October--RapidIO(Rapid Input Output Interface). The RapidIO interface which aims at serialbackboard, chip to chip communication, because of its low power consumption andhardware cost advantage, make it become the best choice for embeddedinterconnection.FT-DSPx is a high performance multi-core digital signal processor which isdeveloped by National University of Defense technology. FT-DSPx integrates twoserial RapidIO modules are used for communication between chips which accord withRapidIO specification rev.1.3, and the use of ARM on-chip bus protocol AMBA3.0AXI interface to SRIO and DSP kernel connections. In order to meet the demand of theinterconnection of FT-DSPx, this paper has designed the RapidIO protocol and AXIprotocol conversion bridge—AMBA-SRIO bridge. The article include:First, the paper has studied the RapidIO interconnect protocol specificationcompletely, analysised of RapidIO protocol architecture, include RapidIO logical andtransport layers protocol, serial protocol in physical layer. Based on analyzing theinterconnection requirements of FT-DSPx, given the overall design scheme of theSRIO.Second, because the DSP internal use AXI interface to the SRIO and the DSPkernel connection, therefore, based on the systematic studied of AMBA3.0BusProtocol Specification, this paper has designed the RapidIO protocol and AXI protocolconversion bridge—AMBA-SRIO bridge. According to GRIO ULI Interface, thesignals between the AMBA-SRIO bridge and the SRIO protocol layer are given, includeinput channel signal and output channel signal. Implementation docking between AXIinterface signal and SRIO protocol layer signal of AMBA-SRIO.Third, this paper has detailed designed the function module of the AMBA-SRIObridge, including the control and status register configuration, address and transactionmapping, asynchronous clocking module. Focus on the address and transaction mappingmechanism, packing and unpacking process and implementing asynchronous dockingpoint of Gray code asynchronous FIFO. Fourth, the paper has finished verification at module level, component level andchip level for the design, mainly elaborates the chip level verification, given the resultsand analysis. The results of verification indicate that, the interface can complete I/Ologic operations, doorbell transaction, support DMA operation, further validation of theAMBA-SRIO bridge components designed in this paper is meet the needs of FT-DSPxinterconnection. Finally,the logic synthesis results are given, based on Synopsys65nmstandard cell library, under temperature of25℃,working voltage of1.2V conditions,the area is109.4051μm2, total dynamic power is10.1024mw.
Keywords/Search Tags:Serial RapidIO, chip to chip interconnect, AXI interface, AMBA-SRIO bridge, protocol conversion, address mapping, Asynchronism FIFO
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