The Realization And Verification Of Serial RapidIO Interconnect Specification

In the nearly30years, the computer industry has achieved great development, the computer processor and the bus performance has a very big growth. But in contrast, bus performance increases can not satisfy the processor request, so bus become one of the bottlenecks of computer performance. In order to solve this problem, a variety of the third generation of fieldbus technology appears. RapidIO (is a representative of the third generation of the bus, with high bus frequency,external pin count, low latency and high reliability.RapidIO has wide application in abroad, and has introduced a number of mature RapidIO chip; but in China, due to high technical difficulty,and technical blockade, the application is still less.This paper is directed at the third generation of RapidIO bus protocol implementation and verification,.Frist introduced the RapidIO background and development situation, and then analyzes the serial RapidIO protocol, to extract the relevant RapidIO realization of the key technology,.After this, the specific realization of RapidIO protocol, has been shown and in order to test the RapidlO’s features and key technologies,we do the functional verification, protocol conformance verification, coverage verification of RapidIO IP. Verification results show that RapidIO IP implementation fully meet the requirements of the agreement.