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Design Of Column-Level ADC And Subsequent Readout Circuit For TDI CMOS Image Sensor

Posted on:2013-05-20Degree:MasterType:Thesis
Country:ChinaCandidate:Z X YangFull Text:PDF
GTID:2248330362461793Subject:Microelectronics and Solid State Electronics
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TDI CMOS image sensor can scan same object for many times and accumulate the signals with low noise. Therefore it can achieve high sensitivity and signal to noise ratio and is very suitable for low light and high speed scanning conditions. It has very high application value in industrial detection and aerial photography areas. ADC and subsequent readout circuits are very important parts of TDI CMOS image sensor. Column level ADC has higher convention speed comparing with chip level ADC, and it consumes lower power dissipation and smaller areas comparing with pixel level ADC. In this thesis the operating principle and design program were studied, and the emphases were to study and design column level ADC and subsequent circuits.The column level FPN and power dissipation of voltage accumulation method were lower than those of current accumulation method. Comparing with traditional line rolling exposure method, the improved line rolling exposure method could realize better synchronous exposure. Therefore, the program with voltage accumulation and improved line rolling exposure was used. For column level ADC, there were several circuit structures, such as single slope ADC, successive approximation ADC, cyclic ADC and so on. All of these ADCS could meet the system performance, but single slope ADC had advantages of lower power dissipation, smaller layout. So the single slope ADC was used in this thesis. With overall system requirements, error correction technique was used to increase the precision of ADC and offset cancellation technique was used to decrease the column level FPN, and positive feedback register was used for subsequent readout circuits to increase circuit reliability.Based on GSMC 0.18um standard CMOS process, ADC and subsequent readout circuits of TDI CMOS image sensor were simulated and verified. And the layouts of these circuits were designed and post simulations had been done. The simulation results shown that the precision of ADC could achieve 10 bits, the speed of ADC was 32K, total power dissipation of 1024 column ADC and circuits were 120mW, ADC and readout circuits could realize their functions and meet system performance.
Keywords/Search Tags:CMOS image sensor, TDI, voltage accumulation, Single-slope ADC
PDF Full Text Request
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