Research And Design Of 10GHz VCO In 0.18-μm CMOS Process

In the field of RFIC(radio frequency integrated circuits), CMOS process is widely applied for its high integrated density and low cost, furthermore, CMOS VCOs (voltage-controlled oscillators) on chip become the hotspot of RF applications. VCO is an important block of modern wireless communications, its performances determine the whole system to a large extent. Based on SMIC 0.18-μm 1P6M CMOS process, a fully integrated RF ring VCO is designed in this paper.Firstly, the basic characteristics and current situation of VCOs are introduced simply in this paper. The VCOs’oscillatory theorys, classical architectures and phase noise models are analyzed. The performances of the ring VCO design are studied. In addition, based on traditional models of RF ring VCO, a high-speed ring VCO with difference delay cell is described, which consists of three stages with multi-loop method. This circuit permits high frequency and lower power consumption through the use of coarse/fine frequency control. In the end, the circuit and layout of the RF ring VCO are simulated with Cadence Spectre-RF, and the simulated outputs are analyzed detailedly.The linear tuning range of the VCO in SMIC 0.18-μm 1P6M CMOS technology is 7.968~8.472GHz, as the supply-voltage Vdd =1.8V. The simulation result shows that the power consumption is 48.5mW, when the oscillated-frequency is 8.083GHz,the phase noise of the proposed VCO is -88.17dBc/Hz @1MHz or -113.1dBc/Hz @10MHz, and core chip area is 132μm×112μm. This ring VCO is able to be used in the wireless communications, such as a radar communication, a wireless transmission, a frequency synthesizer and a clock recovery circuit.