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Key Technologies Research Based On The E1 Transmission Multiplexer Network Bridge Switchs

Posted on:2013-02-02Degree:MasterType:Thesis
Country:ChinaCandidate:Q YuFull Text:PDF
GTID:2218330371956217Subject:Electronics and Communications Engineering
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With the growth of internet and communication services, consumer demand structure has undergone significant changes, such as a growing number of business integration and the needs of individual. As today's most widely used three major networks:telecommunication networks, radio networks and the internet, the situation of integration between them is a trend. The internet is today's most widely used of the most vialable network. Advance of All-IP network indicate that the interconnection of telecommunication networks and the internet is of great significance for network integration. E1 standard and Internet as China's telecommunication network and internet-based network, the interconnection between them has practical significance for the triple play.The bridge is used to realize the connection between the heterogeneous network, it works in the data link layer, the simple processing of the data frame is forwarded out, reducing the processing delay and complexity. In this paper, the E1/Ethernet bridge is used as a two-way transmission of telecommunication network and Ethernet access equipment. After the analysis of various forms, we use a single chip FPGA to implement the over structure of the system. FPGA has a short development cycle, low-cost and convenient system in future upgrades and maintenance.E1/Ethernet adapter is a wide range, but the products are mainly multi-channel E1 bundled Ethernet bridge and 1/4/8E1/Ethernet bridge. There are few products for 16 E1/Ethernet bridge. In the domestic, only a few manufacturers have developed a commercial product. This article gives the design and implementation for 16 El/Ethernet, and it focuses on the key technologies of the bridge used in the implementation process,such as PAUSE frame flow control algorithm, E1 line clock recovery algorithm CDR, the lookup table algorithm, SDRAM controller, arbitration algorithm.All the function is implemented by the verilog hardware description language.Finally, the article shows the function simulation, the synthesized gate-level circuit simulation and timing simulation.and the result indicates that the basic function of the system is correct.
Keywords/Search Tags:Ethernet Bridge, FPGA, PAUSE Frame, E1, CDR, SDRAM, Arbitration, the Look up Table
PDF Full Text Request
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