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The Implemention Of Transger Between Can And Ethernet Based On The FPGA

Posted on:2015-04-01Degree:MasterType:Thesis
Country:ChinaCandidate:B Q PanFull Text:PDF
GTID:2298330467462129Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
To combine the field bus technique with the Ethernet is a new trend in today’s industrial control. The field bus has some advantages such as stability and timeliness, while the Ethernet is quite flexible and could be used in variety of environment. The CAN bus is one of the most widely used bus protocol and good international standard is available, which is recognized as one of the most promising field bus. This paper implement the CAN protocol using the RTL design, which can be reused in other designs. What’s more, the functions of the design could be added or deleted as you like. Otherwise, the Ethernet is implemented by configuring the triple speed megacore which is provided by the Altera company. The data transfer is through two SDRAMs. The paper has completed the work as below:1. Complete the RTL design of CAN based on the FPGA. The function of the CAN consists of three parts. The first one is to write and read the registers of the function which is designed based on the rules of the SJA1000. The second one is the bit synchronism of the protocol. The synchronization of the CAN is a hard point in the whole design. In the CAN, two kinds of synchronization is applied, the hard synchronization and re synchronization. State machine is applied in the synchronization. The last part is the bit stream management. This paper describes the design in detail and gives out the important state machines and simulation waves.2.For the Ethernet part, the triple speed megacore is used for reducing the cost of design. And using the IP core could fasten the design. The TSE-MAC has to be configured by writing and reading the registers. This paper introduces the registers of the megacore in details and the way to configure the registers. Otherwise, the internal FIFO is been introduced. A user application is essential to store and transfer the data. And the MDIO interface has to be configured.3.For the data transfer between the two protocols, two SDRAMS are applied. Initiation and fresh is needed for the SDRAM. For the control of the SDRAM, three parts work together, including control module, command module and write and read module. The control module is responsible for the whole state running. After the work state and initial state works out, the state transfer to command module, in which the interface been configured and gives out signals. The write and read module works on the transmit of the data from the user application and SDRAM.This paper complete the design for the data transfer between CAN field bus and Ethernet, which is meaningful in industry.
Keywords/Search Tags:CAN, ethernet, FPGA, SDRAM
PDF Full Text Request
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