Design And Implementation Of EPA Network Chip's Verification Platform

With the increasing of chip design scale, the chip functions are getting more complex. At the same time, in order to ensure the correctness and stability of the large scale digital integrated circuit chip's design, verification becomes the main bottleneck.More investigations show that the chip's verification can take more than 70% in the chip design cycle. Thus, how to improve the verification efficiency, reduce the verification workload and how to shorten the chip's time to market is becoming an urgent task. Therefore, design the efficient and reusable verification platform can efficiently resolve the problem.The design and implementation of the verification platform is very important for the chip's verification. The paper expatiated how to design the reusable verification platform. The paper mainly researched the methods about verification, for example the binding of interface, the design of stimulus, the realization of the hierarchical verification platform based on OVM and implemented the platform in EPA chip.The paper mainly researched the hierarchical verification methodology and built up a hierarchical verification platform based on OVM. At first, the design of the EPA network chip verification platform was introduced. The verification platform is composed of five layers, they are signal layer, command layer, function layer, scenario layer and test layer. For each layer, aiming at the building and connection of every verification component, it presents a thinking that it should according to the specific circumstances to establish virification platform. To build the reused verification platform, OVM is adopted. Then, various technologies required for building verification platform were implemented, for example interface, stimulus and OOP thought. During the course of the verification, several methods were used, for instance, it presents a method about code-coverage and function-coverage with constraint random stimulus and direct stimulus. At last, applying the hierarchical verification platform in EPA network chip. Experiences from practices, reusable verification platform can effectively improve the verification efficiency, reduce the chip's time to market. It has great significance for EPA protocol's deep promotion and application.