Logic Circuits Design Based On Single-Electron Transistor

The application of conventional microelectronic device will be faced great challenges, such as electrostatic limits, carrier mobility and static leakage, due to the rapidly development of the scale of integrated circuit since its advent. Conventional CMOS technology is predicted to reach its technological limitations shortly after 2020, and intensive studies are being conducted in the fields of device fabrication to find the way to overcome the impending crisis. The single-electron transistor (SET) is expected to be a promising candidate for the kernel device in the future, because of its ultra small size, extremely low power dissipation, and similar device structure to a MOSFET.Recent researches are focused on fabrication of SET, modeling of SET and logic circuits design of SET. Based on the analysis ofⅠ-Ⅴcharacteristics of single-electron transistor and proposed SET circuits, firstly. SET circuits design based on theory of transmission voltage-switches is proposed. With some particular settings on the background charge of SET, PMOS- or NMOS like SET is available; meanwhile theory of transmission voltage-switches is introduced into SET circuits design and several basic circuits are realized by single-electron transistors; on the basis of these circuits, some typical circuits are presented; compared with conventional static complementary logic SET circuits, the amount of device is reduced, and power dissipation and signal delay are decreased. Secondly, multigate-SET circuits design based on Reed-Muller theory is proposed. Based on the I-V characteristics of multigate-SET, a new XOR circuit is realized by four SETs only; then Reed-Muller theory is lead into SET circuit design which is perfectly realized with new XOR and AND circuits. At last, a new type of NSET logic architecture is proposed and sequential circuits are realized. By setting the parameters of the SET, depletion mode PSET is proposed and applied in the NSET logic circuit as pull-up resistor; several kinds of flip-flop are designed and analyzed; then some typical sequential circuits are presented with edge trigging D flip-flop. The design examples are verified by simulations with a SPICE package which included the SET-SPICE model. It is shown that these method and logic circuits architecture is feasible, and the circuits are of high quality compared with the current circuits.