Design And Implementation Of Ethernet MAC Protocol Based On FPGA

With the rapid development of Internet, Ethernet applications are increasingly used, and their speed is faster and faster. In the field of network security, we typically use network filtering devices to analyse Ethernet packets. To make network filtering devieces work properly, the key is correctly to send and receive Ethernet data packets, and this is also the Ethernet media access control (MAC) layer's main function. The design and implementation of Ethernet MAC has an important role in related applications. Meanwhile, as the design and implementation carrier, FPGA can shorten the development cycle and makes debugging very convenient.Based on the analysis of MAC protocols, this paper divides the implementation into three parts, including data reception, data transmission and management. In addition, we use diagram to show the relationship between these three parts, which are further divided according to the data processing flow and specific features. The data reception and transmission parts are responsile for data analysis and processing, which mainly include interface conversion, leading frame and checksum processing modules. The management part provides a debugging and configuration interface, including traffic statistics, PHY chip configuration etc. After detailed design and implementation of each module, we set up a simulation platform and get the simulation results in module level and system level. Finally, we test our design in hardware and analyze the simulation and test results.This paper takes an Altera's Cylcone 3 series FPGA chip as the hardware carrier, and adopts Verilog HDL language to describe RTL-level functions. The design can deal with real time gigabit network traffic and configure the external PHY chip through CPU bus, which achieves the desired goal.