Verification Of Ethernet MAC Controller Based On System Verilog

With the rapid development of integrated circuit technology,the gap between the design capability and verification capability extend further.So far,the time cost of verification in the whole project cycle has surpassed 80%.The verification technology has been the major factor that hinders the rapid development,investment,production and business of the chip.Based on system Verilog,this paper uses the latest and most advanced UVM verification methodology,build a verification platform of Ethernet MAC controller,finish the verification and explore the methods of improving the efficiency of verification.The main research work of this paper was illustrated as follows.Firstly,make an analysis about the key factor to improve the efficiency of verification and determine the characteristics of a good verification method should have.According to these theories,this paper adopts UVM verification method based on system Verilog.Secondly,introduce the Ethernet MAC protocol and realize by Verilog.Finally,write test procedures to complete orientation test of each function and build the testbench based on system Verilog to complete large randomized test,write coverage group to coverage statistics.After verification,the Ethernet MAC controller designed in this paper complies with IEEE802.3 series protocol and could transmit data at the rate of 10M/100M.At the same time,this paper build automatic verification platform based on UVM verification methodology and complete the verification of Ethernet MAC IP.This platform uses the directional test and random test combination,and realizes the coverage driven verification on the function of Ethernet MAC controller,finally,the system achieves 93.97%code coverage and 97.91%functional coverage.