Design Of Broadband Microwave Phase-locked Frequency Source

Frequency synthesis is the key unit in modern electronic communication systems, and as the core component of testing instrument, the ultra-wideband frequency synthesizer shows its importance in the military and civilian domains. Therefore, the study of high-performance broadband frequency synthesis technology is of great significance.The typical working principle and phase noise transmission characteristics of the PLL is analyzed first. After that, they will be applied to different types of frequency synthesizers (including the integer frequency synthesizer, fractional-type frequency synthesizer and charge pump frequency synthesis).Then analyze the causes of elimination of the voltage jump for higher-order charge pump phase-locked loop and the stability of higher-order charge pump phase-locked loop particularly.A 2~6GHz wideband frequency synthesizer based on the YIG tune oscillator (YTO) and fractional-type frequency synthesizer is designed. Also, the YTO driving circuit is simulated. Using the PLL chip HMC700 and YTO, with the third-order passive loop filter and various loop components and EMC layout designed accurately, a broadband, small step and low phase noise synthesis is realized.The debugging and testing of the YTO components and broadband frequency synthesizer is completed. The problems appeared were analyzed. The measured phase noise reached the required -90dBc/Hz @10KHz.The summary of the work in the paper and the improving suggestions for further research were proposed at last.