Broadband High-precision Variable Clock Generation Method And Module Design

The paper aims to the need of the sampling clock signal in modern test equipments, through the analysis of the indicators, a broadband high-precision variable clock signal generator's design ideas and implementations have been proposed. The clock generator can be used for arbitrary waveform generators, oscilloscopes, logic analyzers and other digital test instruments. At present, digital equipment has been replaced to some extent the traditional analog instruments. Digital signal processing can not do without high-quality sampling clock. With the device complexity more and more, the sampling clock signal has been put forward higher requirements. The broadband high-precision variable clock signal generator has been a an important guarantee for high-performance equipment.The main results are as follows:1.This paper studied the development of broadband high-precision clock generator status domestic and aboard. Analysed and compared of advantages and disadvantages of several common clock generator's method, and finally identified using direct digital synthesis technology (DDS) + phase-locked loop (PLL) + divider technology to be implemented.2.The thesis discussesd the feasibility of achieving broadband high-precision variable clock generator through DDS + PLL + divider technology. The clock generated by DDS was used as the PLL's excitation signa. The frequency resolution was fine tuned by DDS, and the high-frequency clock signal was achieved by PLL. The divider was used to achieve full coverage bandwidth.3.Analysed DDS and PLL structure and their main performance. Clock jitter and phase noise impact was on the detail. A detailed analysis of simulation results on the phase noise performance in all aspects of the loss distribution provided a theoretical reference for selection the devices.4.Analysed the requirements of the sampling clock for 1.25GSPS arbitrary waveform generator, and designed a program based on DDS + PLL Technology.The results of the tests achieved the desired design requirements, phase noise <-90dBc/Hz @ 10kHz, frequency resolution met the 8-bit frequency resolution requirements, short-term frequency stability was better than 0.5ppm.