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The Spacewire Codec Ip Core Design And Implementation,

Posted on:2009-04-13Degree:MasterType:Thesis
Country:ChinaCandidate:P TangFull Text:PDF
GTID:2208360278461474Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
On–board data bus network is used for communication and data exchange between on-board electronic devices, which is one of the key components in on-board electronic systems. The reliability, speed and flexibility of the on-board data bus network have direct effect on the performance of the whole on-board electronic systems.SpaceWire is a full-duplex, bidirectional, serial, point-to-point data link, which greatly meets the demand of high-speed on-board data transfer nowadays. It is based on IEEE 1355-1995 and LVDS standard(ANSI/TIA/EIA-644), especially used for space application. It is put forward by ESA in 2003. ESA, NASA and JAXA currently have done much research on SpaceWire. SpaceWire technology has been successfully applied in space missions.This project designs SpaceWire Codec, which is almost according with the SpaceWire protocol. We validate the design by the communication between the Codec and the SpaceWire detection device.This article contains as follows: the SpaceWire protocol specification; the research development and the application about SpaceWire in detail; partition of the Codec and the CPU interface modules; the module interface signal definition; the RTL logic codes implemetation; the synthesis and place and route of the whole design; the timing simulation based on ModelSim. Finally, we test and validate the whole design.The SpaceWire Codec designed in this article basically accords with the SpaceWire protocol. It can be used in SOC by consummation, which can reduce the cost and promote the IP reuse. The design has laid the foundation for on-board application of SpaceWire.
Keywords/Search Tags:on-board data bus network, SpaceWire, SpaceWire Codec, FPGA, DS coder-decoder, multi-asynchronous clock design
PDF Full Text Request
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