Study On Key Technology Of Spacewire For On-board Data Bus Network

The on–board data bus network, which is one of the key components in on-board electronic systems, is used for communication and data exchange between on-board electronic devices. With the development of space exploration technology, satellites carry more and more equipments and facilities, which lead to the amount of data to be produced and dealed increases rapidly. The reliability, speed and flexibility of the on-board data bus network have direct effect on the performance of the whole on-board electronic system.SpaceWire is a full-duplex, bidirectional, serial, point-to-point data link, which greatly meets the demand of high-speed on-board data transfer nowadays. It is based on IEEE 1355-1995 and LVDS standard (ANSI/TIA/EIA-644), especially used for space application. It is put forward by ESA in 2003. ESA, NASA and JAXA and other organizations currently have done much research on SpaceWire, SpaceWire has been successfully applied to a number of international space missions.Based on sufficient research, this paper first describes SpaceWire bus application and development at home and abroad, defines the research direction and main contents. Then the practical application as the target, to carry out the depth study on 2 key terminals of SpaceWire data bus network, which include the SpaceWire Codec IP core and 8-port Router IP core. Next, base on the mathematical model of SpaceWire network, we design a SpaceWire transport layer protocol, which guarantees the network quality of service (QoS), and complete its operation mechanism, operation types, packet formats and the design of overall implementation architecture. The software simulations are executed, which validates above FPGA designs are reasonable and correct, and tests the network transmission delay, transmission efficiency and other parameters. Finally, we build a variety of hardware verification system on SpaceWire network test platform, integrated test designs implementation and network performance parameters.The main innovation can be summarized as follows:1. Proposed a hardware can be realized with a transmission delay, reliability, etc. QoS assurance mechanism SpaceWire transport layer protocol, and completes the protocol structure and key hardware circuit design. The QoS assurance mechanism of this protocol has some innovative designs: Sliding window based on micro-flit of the transmission and retransmission timeout; Connection-oriented transport priority preemptive; Global time-slot based on synchronization and asynchronous data packets mixed transmission.2. Designed and implemented a configurable low-power SpaceWire Codec IP core, its data signaling rate can be adjusted according to the type of transmission character. The design is consistent with SpaceWire protocol specification, and compatible with the standard protocol terminals. By soft simulation and hardware test, the switching delay is less than 120ns on 200Mbits/s data rate of transceiver. Transmission performance is better than the same type of IP core of ESA. Power consumption compares with standard protocol terminals has significant improvement.3. Proposed a streamlined CrossBar arbitration framework, SpaceWire router application of this structure can complete priority based, round-robin and group adaptive routing. By soft simulation and hardware test, the structure has lower resource consumption, switching latency down to 100~125ns, which is better than the mainstream ASIC chip AT7910E on ESA spacecraft.The SpaceWire Codec and Router IP core in this article have higher performance and more complete functionality compare with other same type designs in China. After further testing and validation, they can be used in SpaceWire test equipment, the SOC-related and space mission, with a practical value. The research and exploration of SpaceWire transport layer protocol and its hardware implementation with inspiration and reference for future research SpaceWire network technology.