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Chipsets Sample Aging And Removal Of Aging

Posted on:2010-05-03Degree:MasterType:Thesis
Country:ChinaCandidate:Y G ChengFull Text:PDF
GTID:2208360275491387Subject:Electronics and Communications Engineering
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In the past few decades,semiconductor chips have been playing a more and more important role in human's life.To meet and exceed customer's expectation, semiconductor manufacturers need higher standard of product quality and reliability. To met a product standard of reliability,special testing techniques need to be incorporated into the IC manufacturing process.For most semiconductor chips,the specific reliability required is quite high,some require 3 years,some require even more than 7 years.Testing such devices for reliability under normal operating conditions would require a very long period of time to gather the data necessary to understand product reliability performance.Under this scenario,a semiconductor chip might become obsolete by the time the company could guarantee its reliability.Semiconductor companies can gather reliability data more quickly by using accelerated testing,which shortens the time to failure process significantly without changing the device failure characteristics.Among the most widely accelerated testing methods in the semiconductor industry is burn-in.It stresses semiconductor devices for a specific time period under stress conditions such as elevated temperature and voltage.Burn-in works by triggering failure in a defective chip without damaging the good components.Thus,the process screens for those with inherent defects,and those with defects resulting from manufacturing processes.A properly arranged burn-in screens out the weak devices,thus improving the quality and reliability of the shipped product as a whole.But it is a very time-consuming process compared with normal electrical testing.So burn-in can always become the bottleneck of product manufacturing flow.Other than this,burn-in process requires high capital costs.To counter time and cost problems,it's important to improve burn-in productivity.Sample burn-in is a method we can use.It means that during high volume manufacturing,certain amount of products can skip burn-in,direct go through class time and then ship to customers.The ratio of products going through burn-in to the whole production volume is called sample burn-in rate.Sample burn-in rate can be reduced through burn-in condition optimization such as increasing burn-in voltage. However,for a product with extremely high demand,it's not enough to reduce sample burn-in rate only through burn-in condition optimization.To meet customer request and reduce manufacturing cost,a more proactive actions need to be taken to further reduce sample burn-in rate.Research indicated that high voltage stress test is a method to accelerate infant mortality to fail in early testing operations,with its implementation,the incoming product reliability prior to burn-in is higher than before, thus reduce sample burn-in rate without jeopardizing product reliability.This thesis is about a real project which enabled sample burn-in and eliminated burn-in on a chipset product.In this project,I formed a research team to solve the product capacity issue.Through deep research,this team found a few different solutions to reduce sample burn-in rate step by step,and eventually achieved burn-in elimination through high voltage stress test implementation.This product saved huge cost for company.
Keywords/Search Tags:Reliability, Integrated Circuits, Burn-in, Sample Burn-in, High Voltage Stress Test
PDF Full Text Request
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