| Radio Frequency Identification(RFID),as an automatic identification technology, is developed with the maturity of large scale integrated circuits. RFID tag is a kind of contactless integrated circuit cards, which is a combination of radio frequency technique and integrated circuit card technique. A tag is based on radio frequency communication to exchange data with a specified RFID reader. Compared with traditional IC card, RFID tag has more extensive applications for its advantages such as larger data storage capacity and faster transmission speed. Meanwhile, comparing with13.56MHz RFID system,860MHz~960MH RFID system has farther reading distance and fasters speed, etc. Nowadays,it has become a hot spot in RFID research.Based on the deep study of the technologies about the tag, this thesis presents a design scheme of the tag IC operating at 860MHz~960MH, according to ISO/IEC18000-6B.This paper discusses the developing status of RFID,the bottle-neck of RFID.The design of the RFID Smart Label IC is finished on the basis of detailed research on the communication protocol between reader and RFID Smart Label.. The design is accomplished using Top-down design flow and standard cell library method. At first, detailed specifications of the function and interface are made. The IC is divided to many function modules. Then these modules are realized by using VerilogHDL according to the specifications. After finishing the codes, testbenches for every module are written and the functions are simulated in Modelsim SE 6.2b,the design has been successfully passed functional and FPGA verification. At last the design is inputed to Synopsys Design Compiler to accomplish synthesis. In this process the object library and constraints are designated.While simulating the design we get correct result. It means the design we finished can perform functions and timings correctly. The result of synthesis is satisfactory. These assure the high performance of the IC and the accomplishment of back-end design. |
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