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Sdh Transmission Equipment Clock Board Phase-locked Tracking Feature Of The Design And Realization

Posted on:2008-06-22Degree:MasterType:Thesis
Country:ChinaCandidate:P Y HaoFull Text:PDF
GTID:2208360212499585Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In synchronous digital hierarchy (SDH), data is transfered in fiber, which has been applied in the telecom network in a large scale owing to its high speed, low cost and safety. SDH has unified criterion in all over the world, moreover, with the far-sight and compatibility in designing forepart, SDH would exist to be main way of transmission and keep superior in a long time.Synchronization is the base of transferring data correctly in digital network. SDH transmission network, as a special digital network, it is necessary for SDH equipments to have synchronization function. The synchronous clock board in SDH equipments, of which the key module is phase-locked and tracking module, is the core of SDH equipments, and it is mainly used for synchronizing network. In order to synchronize, the phase-locked loop (PLL) is widely used in modern communication system, because its performance is much better than that of other techniques, and the digital PLL works better.This thesis provides the practical application of PLL in SDH network, and this thesis includes three subjects: principle research, mainly design and realization. The principle of SDH technology and synchronization structure of SDH network are introduced firstly, then the function of the synchronous clock board is described. Because PLL is the main unit of phase-locked and tracking module, its principle and characteristic are researched thoroughly, and its performances of acquisition and tracking are simulated in Matlab. This research gives the possibility for introducing PLL to the synchronous clock board in theory.Then, in this thesis, the design of digital phase-locked loop (DPLL) is presented. This DPLL contains a purely digital phase detector which is implemented by field programmable gate array (FPGA), loop filter which is realized by software, and voltage-controlled oven-controlled crystal oscillator.In fact, the advantage of this thesis is that PLL is realized by software. Therefore, during realizing application, this thesis designs and realizes the PLL controlled by software. Three different groups of parameters are provided in terms of the performances of acquisition and tracking of PLL. The function of software is in charge of PLL, in the case, PLL will choose appropriate parameters according to different working state, and will achieve locked state as quickly and accurately as possible in the end. And, in order to improve the performances of acquisition and tracking of PLL in the extreme, many unsafe factors are considered such as nonlinear phase, out of lock and so on. For solving these problems, some work is carried out to optimize the performance of PLL. As a result, a larger lock-in range and more intelligent operation are acquired. In addition, an interrupt is designed detailedly to embed the PLL software to synchronous clock board software.In the end, the module is tested. The result shows that the module performs well, and the module has been applied in SDH equipments.
Keywords/Search Tags:Synchronous digital hierarchy, Synchronization, Phase-locked loop, Interrupt
PDF Full Text Request
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