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H.264 Video Decoding Entropy Decoding Hardware Design Ip

Posted on:2008-02-21Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhaoFull Text:PDF
GTID:2208360212479173Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In recent years, with the fast development of communication technology, the multimedia application which depends on this technology becomes more and more popular. Digital video application which is one of the most important parts of multimedia application can be found in more and more portable devices nowadays. Many international standards about image compression have been set up by ISO and ITU. All these standards propelled the popularization of Digital video application, and H.264/AVC is the latest standard. In this standard, several new methods have been used to produce an excellent performance compared with old ones.The outstand level of performance is traded by the complexity of this algorithm. When software can hardly achieve the requirement of this application, VLSI becomes a good choice for this algorithm. In this paper, it describes the design procedure of such a VLSI circuit. The entropy decode is one of the most important and complex parts of the H.264/AVC standard. This paper has deliberately analyzed the syntax element definition and the procedure of data process used in JM code. Optimization also has been applied in the design with the consideration of hardware property. The items such as function division, port definition, FSM design, and data storage have all been detailed discussed in this paper. Plenty of verification works are included in this article, which guaranteed the efficiency and preciseness of design. All designs in this paper are based on industry standard; it can expect that chips which adopt these designs will be used in several portable devices in the near future.
Keywords/Search Tags:H.264, IP core, entropy decode, CAVLC, Perl
PDF Full Text Request
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