The Algorithm Study On CAVLC Based On H.264/AVC And Its VLSI Implementation

H.264/AVC has a higher compression encoding efficiency than any video standard such as MPEG-4, H.263 and so on. This thesis aims at researching the CAVLC algorithm and the VLSI design. The entropy coding after transform supports CAVLC and CABAC. Although CAVLC adopts the VLC encode, it is so different from the standards before, which works according to context. This improves the coding efficiency, but makes the design much more difficult.The main work of this dissertation:1) Study on the H.264 video standard, and research the CAVLC algorithm. Then the proposed method to design the encoder and decoder of CAVLC is presented. The whole design is realized by Verilog Hardware language;2) In the decoding processes, except for the syntax of level, the other four must be decoded by looking up the code table in reverse. And the traditional method reads the bit one by one, compared with the table in the memorizer. But this makes the speed of the decoder slower, and the times of looking up the code table are too many;3) This dissertation proposed a new deterministic algorithm. The proposed method firstly optimizes the given table, secondly detects the first"1", and then chooses how many bits to be read according to the kind of syntax. This makes the decoding process to three steps. Speed up the decoding processes and do not increase the memorizer space;4) The proposed decoding method can get the right result, the synthesis frequency can rise to 200MHz, and the area decreases from 4404μm2 to 2301.8μm2.