Based On The Dual Port Ram Data Cache

The work in this thesis is part of a Preliminary Research Projects. Based on the design of 32-bit embedded microprocessor "Longtium R2", designed and implemented the Dual-port Data Cache, which is applied to the "Longtium R2" microprocessor, achieved synchronization snooping, and effectively improved the processor's performance. Based on the Dual-port RAM, studied Multi-port Data Cache, proposed a Sixteen-ported Data Cache.The research work of this dissertation mainly includes:1. Based on analyzing the architecture of "Longtium R2" microprocessor and the characteristic of Dual-port RAM, designed and implemented the Dual-port Data Cache, which is applied to the "Longtium R2" microprocessor. The simulation results and analysis prove that it is fully compatible with PowerPC750 in function.2. Studied the Data Cache Coherence Protocol, based on the Dual-port RAM, implemented Data Cache synchronization snooping, therefore effectively solves the High Speed Cache Coherence problem of the "Longtium R2" under multi-computer environment.3. Researched on verification methods, and comes up with one unique verification method for "Longtium R2". Direct and random tests are performed to complete the verification of Dual-port Data Cache, and get the 100% code coverage and functional coverage.4. Studied the expansion of the Dual-port Data Cache, designed a Sixteen-ported Data Cache, The simulation results showed that on the average, access time is decreased 20% over Single-port RAM based Data Cache.The embedded 32-bit microprocessor "Longtium R2" is compatible with the instruction set and the interface timing of Motorola's PowerPC 750 microprocessor. The ASIC chip had been successfully taped out. The processor had been passed through the testing of the real-time monitoring program and the embedded operating system VxWorks.