Area Optimization Technique Based On AIG For Dual-logic

Area,as the primary indicator of integrated circuit design,has been the main goal of logic synthesis and optimization.Logic synthesis is closely related to the logic representation and logic functions are usually represented by Traditional Boolean logic(TBL).Studies have shown that for some circuits,using Reed-Muller logic(RML)has better speed,area,power consumption than TBL.Since there is synthesis limitation of single logic representation,the logic function is represented in TBL and RML called dual logic.In logic synthesis and optimization process,the representation method of logic function is equally important.In recent years,And-Inverter graph(AIG)as a logic function of the representation form is widely used in logic synthesis and optimization process.This paper starts from the representation method of logic function using AIG,and proposes a novel method of detecting the structure of XOR logic based on AIG.A new graph called And-XorInverter graph(AXIG)is constructed to represent the dual logic form of logic function.In mapping process,a method based on standard cell library mapping is proposed.The content of this thesis is divided into the following three parts.(1)Detection of logic functions based on AIG.Given a logic function,the logic function is detected by the AIG.In detection process,according to the gate node and the combination of the inverter can be achived node type conversion.The experimental results show that this method can effectively realize the logic optimization of graph compression which lays the foundation for the subsequent logic optimization.(2)Achieved the area optimization based on the dual logic.A novel method is proposed for logic functions synthesis using And-Xor-Inverter graph(AXIG).First,logic function is represented in And-Inverter graph(AIG)and an optimized AXIG is constructed by detecting the structure of XOR logic;Second,transistor count is used to measure the area of the circuit in the process of technology mapping.Finally,the area optimization method based on AXIG is realized.The proposed method is implemented in C language and tested on MCNC benchmarks.Compared with state-of-the-art optimization tools,the experimental results show the efficiency of the proposed method.(3)Applied to the proposed polarity graph method based on AXIG.According to the logic cell in the standard library,the technology mapping is completed with the logic function implemented the circuit with the smallest inverters,and finally realized the circuit area optimization technology.