S-band Frequency Synthesizer Design And Simulation

The frequency synthesizer is a important part in modern communication system. With the development of communication technique, it requres the frequency synthesizer have very high performance. Designing a high performance frequency synthesizer is very important research field in communication technique. The charge pump PLL(phase-locked loop) frequency synthesizer has many advantages, such as high integration, low power consuming, no locked phase difference, low phase jitter. It is widely used in communication system now.The basic operation principle of phase-locked frequency synthesizer composed of charge pump phase detector and passive loop filter is expatiated systematicly in this paper. The behavior of the phase noise, spur restraint and the locked time are analyzed in detail. The paper analyzes the design method of passive loop filter thoroughly, and presents a effective design method. The method has obvious advantage comparing to the design method in existence. At last, a software based on this method was introduced.Using computer aid design software can largely reduce the difficult of designing and debugging a PLL frequency synthesizer. By using ADS(Advanced Design System), a PLL frequency synthesizer performance simulation platform was established, and the simulate methods of the frequency synthesizer were analyzed. At last, the PLL frequency synthesizer theory and the loop filter technique were validated through simulation.In order to indentify the validity of the designing and simulation technique deeply, a S band PLL frequency synthesizer was designed. Through comprehensive measurement of the frequency synthesizer, It shows that this synthesizer has good performance of the phase noise and spur restraint. According to the comparison of the measurement and simulating result, it shows that the design and simulation technique is correct.