Ic Fault Diagnosis Based On Current Research

Fault diagnosis is a critical problem in IC chip production. It is difficult for traditional voltage-diagnosis method to detect all kinds of faults under current IC production art condition, moreover, with the progress of the VLSI, the pin number of a chip is comparatively limited that it is hard to detect the redundant fault in the chip. Recently, novel fault diagnosis technology including IDDQ and IDDT has developed rapidly. These new methods adopt the circuit information contained in the power supply line current to realize the fault diagnosis. And these methods have now been an important supplement to the diagnosis method based on voltage detection. This research is mainly concerned with the fault diagnosis using current signal. In IDDQ research, the circuit structure and the quiescent current were used to analyze and locate the fault in the chip which avoids to compiling the fault dictionary. Following work is concerned with the location algorithm's diagnosis generation. Genetic algorithm is applied to realize this generation. Moreover, in IDDT diagnosis, the conception of fault feature curve and feature space is proposed to diagnose the fault in the analog and mixed-signal circuit. Fault signature contained in the transient current is projected into fault feature space. Preprocess technique such as wavelet transform, PCA, normalization, are used to plot the fault feature curve. The fault diagnosis is realized through comparing the distribution of the IDDT in the feature space and the fault feature curve. Simulative experiments have realized our algorithms, and we compared the simulative results with the literatures. These experiments have shown the effectiveness of our algorithms.