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Study And Application Of IDDQ Test Technology For DSM Device

Posted on:2009-08-25Degree:MasterType:Thesis
Country:ChinaCandidate:F Q CaoFull Text:PDF
GTID:2178360245474119Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Once the IDDQ testing theory was brought up, it caused for great concern in the IC industry. As the effective method of assistant testing, IDDQ testing plays a signicant role in detecting chips physical defect, increasing the fault coverage, screening naked die and burning test of chips.IDDQ from DSM is different from the traditional IDDQ. Although the new test method still take source current as study objection, it doesn't simply increase several current testing points like the traditional way, but with the help of EDA tools and according to the fault model creating patterns with high fault coverage, achieve the test of high densitied current points. And it doesn't accomplish the test through the comparatition of single limit as the traditional IDDQ, but apply multimethod of statistic, eliminate the interference from the testing data and give prominence to the related current changes.It has been proved that, nicer IDDQ solution is not only the effective complementary for the functiontest and the scan test, but it can very often replace and exceed them. There are in-depth studies about it abroad, while in the country, because of the requirement on the complicated chips for the testing technik limited, and the complexity of IDDQs operation, no publicy report about this has appears yet.This paper is based on the deep analysic of the IDDQ test theory, through comparing the test result of the swatch chips, and against this a new effective solution, and discuss about the possible affectiv facts, brings a lot of creative improve methods: first, high quality vector sets were screened out by applying delta method. Second, high quality sample chips which were using the limits cauculating were screened out by applying several test methods. Third, the data was handled with normalized method which eliminates the noise influence. Effectively dcreaseing the chiptest cost, increaseing the test coverage, we successfully achieves the test solution under the△Iddq technik, and fill the blanket of related technology.
Keywords/Search Tags:IDDQ testing method, DSM device, high fault coverage, physical defect, vector set, Current Ratio, △IDDQ, normalize, Correlation
PDF Full Text Request
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