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Pda-based Digital Video Channel Receiver System Design And Implementation

Posted on:2004-10-07Degree:MasterType:Thesis
Country:ChinaCandidate:J K XuFull Text:PDF
GTID:2208360095460243Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Data Broadcasting, which boasts the technical advantages of "Magnanimity, High-Speed and Reliability", is highly valued when compared to the other communication methods and the old-fashioned analog broadcasting systems, and has developed rapidly for the recent several years.In this project, a DVB-T Based Terrestrial Data-Broadcasting Systems receiving card is made with the cooperation of UESTC(University of Electronic Science and Technology of China) and Co.INTEL in Shanghai. This project is oriented for the implementation of the receiving end of DVB-T channel,and PDA receiving Card based WinCE(windows CE)OS.The end is engaged for receiving the downriver broadcasting data from the terrestrial channel.The project is based on the in-deep study of the DVB-T Standard and the DVB Data Broadcasting Specification. What we have adopted in this system are the digital Tuner DTQ-1A of PHILIP TDA10046,and the FPGA of ACEX series produced by ALTERA Corporation,and the IDT7206 FIFO produced by IDT Corporation.The staff of the project also completed the communication-controlling program and WinCE drivers for this card, along with the application program dedicated for the system.The system can carry out the following tasks: receiving, demodulation, decoding,and playing back of the terrestrial-broadcasting data. In the design of this project, the author has participated in the following works: the system design,chips selected,and making schematic circuit diagram of the interface hardware,and PCB design,debug,and the FPGA control-program design, system testing and debugging,and some drivers of WinCE.This paper will introduce the principle of the DVB-T series standards firstly, then the sketchy design of the system will be stated...
Keywords/Search Tags:DVB-T, PDA, WinCE, FPGA, FIFO
PDF Full Text Request
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