FPGA Design Of Data Process System On All-fiber-optical Current Transducer

In recent years,with substantial increase in rated voltage lever and transmission capacity of power system,traditional electromagnetic current transducer has a series of deficiencies.It is difficult to meet the needs of the development of the power system.All-fiber-optical current transducer(FOCT) replaces the traditional electromagnetic current transducer in power system for its own advantages.With so many advantages,such as fast,stable,repeatable,easy integration and high precision,digital signal processing has been gradually replaced the traditional analog signal processing in many areas.Nowadays the devices that commonly used to achieve high-speed digital signal processing are DSP and FPGA.In this topic,the specific scheme,used for the characteristics of the output signal on all-fiber-optical current transducer, using the correlated detection algorithm to extract the noise drowned by the weak signal.In addition,the realization of the hardware,the use of DSP+FPGA system designs.Which, FPGA design is the most important research of this article.According to peripheral device of FPGA including ADC and DSP,as well as to realize correlated detection algorithm,FPGA is divided into several function modules,which including a clock module,a asynchronous FIFO module,an internal address generator module, a ping-pong memory module,a ADC test module etc..FPGA design is achieved basing on the Xilinx's software platform ISE,applying the Verilog HDL language.Besides,this design uses the XST synthesis tools to synthesize and uses the ModelSim simulation tools to simulate the timing.In addition,metastable problem which impacts asynchronous FIFO design has been resolved by synchronization and this method is also applied to data address and signal processing,which can reduce the occurrence of unnecessary errors effectively. Through the design and debugging,the correlated detection algorithm can normally run in the hardware circuit,and high-linearly detect the measured signal to meet the target.But there are still some shortcomings and room for improvement,such as consider using FPGA to achieve more pre-processing algorithm,in order to make full use of FPGA resources and to facilitate clock synchronization.