FPGA Chip Automatic Download Test System Development

The test of FPGA chip is largely different from other ASIC device. Because before FPGA chip is been tested, tester should complete the configuration of FPGA chip, while other ASIC device should only be input with indicated testbench when test. Further more, on the one hand, to completely test an FPGA chip, there are hundreds of patterns to be needed; on the other hand, to reduce the unnecessary manual operation, the test of FPGA chip should be on the system, which has enough channels to cover all the pins been tested, due to the abundant IO in FPGA. This paper will focus on the realization of alternate process of configuration and test automatically, which will speed the test and reduce the cost both on time and money.In this paper, an automatically test system is designed, based on PC and Agilent 93000. In detail, PC have the control of USB cable.configure the FPGA chip in JTAG protocol. An ACK signal will be given when the configuration is successful, and received by Agilent 93000, which will give out the indicated testbench to test the FPGA chip. When test finished, an REQ signal will be given to PC, which require PC to start the next configuration. This process will be carried on again and again until all of the test been finished. Based on the first design described upon, this paper present another system, which is realized with CF card and Agilent 93000. This system is different from the first one on realization:it uses a programmed CPLD as the control circuit, which configures the FPGA chip in slave parallel protocol and communication with Agilent 93000 to complete the whole automatic test.The designs described upon are able to meet the demand of FPGA chips choosing, and is good enough for FPGA test.