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Studies On Asynchronous Adder Design And Research Techniques Based On Macro Cell

Posted on:2011-05-29Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhuFull Text:PDF
GTID:2198330338986099Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Asynchronous circuit generated all the control of local clock signals using handshake protocol, replace the global clock signal of its synchronous circuit using interactive link. Compared with the synchronous circuit, the asynchronous circuits have the particular advantages in speed, power, performance, robustness and many other aspects. However, the asynchronous circuit is at the initial stage, and still exists lots of problems. For example, lack of some EDA tools, the timing in some test methods and system control part are complex and so on.In this paper, it describes and complete the macro cell design flow and library generation methods. As the macro-cell can achieve much more complex than the standard cell features, the method can improve the design efficiency. The technology library involve the power, timing, capacitance extraction accuracy of each parameter and so on. The design and implementation of the C cell, for example, was simulated, parameter extraction, data collation also compiler the technology library in the HJTC Logic 0.25um process. Make it one of the standard cell library macro cell. So, it can be convenient for asynchronous control circuit.Based on the new asynchronous circuit design method, a 64-bit asynchronous adder is designed, which is composed of data part and control part. It can achieve sub-word parallelism, which could be compressed into a multiple sub-word for word operation, and then, the results can restore the original bit width difference. A redundant four-phase latch control( RFLC) protocol is presented and implemented in the control path.. This agreement increases the efficiency of handshake protocol. However, the corresponding cost is the area. It is based on C-element circuit of the agreement to synthesis.
Keywords/Search Tags:Asynchronous circuit, Cell Library, Macro cell, Sub-Word Parallelism, Adder, Handshake protocol
PDF Full Text Request
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