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Design Of 12 Bits 80MHz Current Steering DAC

Posted on:2012-11-13Degree:MasterType:Thesis
Country:ChinaCandidate:P LiFull Text:PDF
GTID:2178330332487706Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Digital to analog convertor (DAC) is the bridge between the digital world and theanalog world, which is the key module in the digital signal processing systems. Fastdevelopment of processor increases the speed and precision of the digital signalprocessing systems, and meantime the demand for the speed and precision of DACbecome much more critical than before. Nowadays, portable devices develop fast, andthe power dissipation of DAC become more and more small. The research on the highspeed high precision low power dissipation DAC has become one of the importantaspects in IC design.This paper has designed a 12 bit 80MHz current steering DAC, which is based onthe TSMC 0.13μm Mixed-Siganl SALICIDE 1P8M(1.2V/2.5V)CMOS process.Firstly, compares different types of DAC, make trade off between the linearity and thearea of the chip, and make the choice that the designed DAC uses the 7+5 segmentedarchitecture. And then analyze and designe the main modules of the DAC, whichinclude bandgap reference, voltage to current converter, current source array,thermometer decoder and current source driver. In order to verify the function of thedesigned DAC models, simulation of every designed module is done, and simulationresults indicate that every designed DAC module satisfies our demnds.At last the layout of DAC is designed, which includes the overall arrangement ofthe whole DAC layout and the current source array layout. The design of the currentsource array layout is one of the important and difficult.points of DAC design. The Hshaped power line of the current source array and the adder shaped current source arrayarrangement are introduced detailly.System simulation results indicate that DNL and INL are much less than 0.5LSB,settling time is 7.452ns. When the frequency of input signal and output signal are10MHz and 80MHz separately, signal to noise ratio is 73.3407dB, spurious freedynamic range is 89.9658dB, and the effective number of bits is 11.8768. Systemsimulation results of the DAC satisfy the design specification.
Keywords/Search Tags:current steering DAC, thermometer code, binary code, current source array
PDF Full Text Request
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