Study On Verification Platform Based On MCU+FPGA

With the fast development of the Internet and Telecommunication, the network technology plays more important role in lives. Furthermore, the trade of increasing of network will be lasting in the future. The network processor provides the network system hardware platform for the future network, with the flexibility and high performance. Many programmable RISC processors are included in packet process, since the complicated structure of the network technology. The verification of the SoC is more complex for the scale of network development. So, in this thesis, a new solution of verification is put forward to accelerate the process, and achieves perfect result.In this paper, the structure of the network processor and the communication of the models were introduced, especially, for the detail of the key model, Microengine. Then, the MCU development and effect in verification of FPGA were introduced, also. The disadvantages and advantage are put forward for the method. Finally, the verification platform and results are finished.The technology based on the MCU+FPGA verification has sense to the complex system, which puts the mixture of C program models and hardware modules into the FPGA to hardware verification. This technology is a new method, which is easier, faster than others. Further, the system can connect to the work environment to verify.