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Multiple Functions Card Of CPCI Bus Based On FPGA And WDM Driver Design & Implementation

Posted on:2010-02-01Degree:MasterType:Thesis
Country:ChinaCandidate:M FangFull Text:PDF
GTID:2178360302466890Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the development of integrate circuit design, the circuit design based on intellectual property(IP) Core has been applied to the series of communication interface circuit. It makes design process become more effective in this way and reduces the period of design. Meanwhile, it can reduce the cost of design after IP library has been constructed. A lot of communication cards based on CPCI bus are used in many fields such as military, industry control and telecom. CPCI bus is a compact PCI bus and holds the features of high transmission velocity, high reliability and dominates an advantage station in correlative projects. However, many serial communication cards based on CPCI bus which they depand on foreign chips, then it increases the cost of design owing to these expansive chips. The key of problem is absent of own intellectual property. Therefore, this dissertation implements multiple functions card of CPCI bus based on FPGA and WDM driver design attributes to self-determination research, also it has possessed the realistic meaning and value of application.In this dissertation, the protocol of CPCI bus and the frame format of UART including the function and architecture of these two IP cores are firstly analysised, then the ways of implementation of sub modules of two IP cores are discussed. Meanwhile, reliable code design in process of designing PCI IP is taken into account. A kind of asynchronous FIFO based on modified gray code pointer and synchronizer is presented, which can match the transport velocity of data within PCI interface and user interface. In addition, a kind of interrupt manged mechanism which not only saves interrupt resource but also keeps realtime and high reliable in UART dynamic extended circuit is presented. Then function simulation and timing simulation of two IP cores are completed, and multifunction card is analysed by using of Altera SignalTap II logic analysis tool. All simulation results and logic analysis results accord with design requriment. At last, after WDM technology about device driver developing is discussed, the driver of this multifunction card and its test program are developed and tested. After this card driver is installed into PC, it is recognized by PC and possesses configuration resoures, also emulated mutli serial ports in device manager. During continuing test by using of application program, correct data transport is presented and the card and its device driver keep work well. Therefore, these results prove that two IP cores are designed correctly and multi-COM dynamic expansion through multipling soft IP is realized feasibility.This multifunction card based on PCI IP core and UART core which possesses agilitily , and these cores are transplantable. The way of design has held good reference and worthiness in the field of integrate circuit design.
Keywords/Search Tags:Compact PCI Bus, FPGA, IP Core, UART, Device Driver
PDF Full Text Request
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