Design Of USB Device Interface IP Core Based On FPGA

Universal serial bus puts forward by seven corporations (Intel, Compaq, Microsoft, IBM, NEC, Northern telecom) which are led by the Intel. It is cost lowly, fast and easily expandable. USB is one of the most pervasive bus standards nowadays in electronic products. But in the design of the electronic products, using the USB interface is not facilitation and the cost-effective is low. Now, SOPC (System on a Programmable Chip) greatly increases the high cost effectiveness of electronic products owing to the development of EDA. Therefore, this paper designed a USB device interface IP core which can be used in the SOPC system.This paper mainly discusses the research and design of USB device interface IP core. This paper uses the top-down design method after study the USB protocol deeply. It reduces the complexity of the design and makes the structure of the whole design clearly. At the same time, the speed of the IP core is fast by using the hardware description language in the design. This paper mainly contains the following aspects:1) This paper presents the USB device interface IP core design ideas as well as the module division according by researching the way of data transmission and communication protocol standards of the USB system. These functional modules are: physical layer module, UTMI module, controller module, FIFO module, memory interface module and protocol layer interface module. In these modules, the physical layer module, controller module and protocol layer interface module are the most important ones.2) At the same time, making detailed design for each functional module by Verilog HDL hardware description language. The physical layer module is used to separate the clock and data. The controller module completes the enumeration work and data transmission according the use of the dedicated controller design method. The protocol layer module uses the finite state machine design method to achieve success in complex of USB protocol, including the pack and unpack of data.3) This paper simulates the USB device interface IP core by the professional software (QuartusⅡand ModelSim SE). In the system simulation, the paper tests the control endpoint, IN and OUT endpoint. According to analyze the data, validity of the data transmission is proved. Then this paper validates the USB device interface IP core by the FPGA hardware verification. During the hardware verification, the USB host and the device interface accomplish the USB data communication and get the USB data by USB HOUND.Experimental results show that this USB device interface IP core can be used in the SOPC system as an independent IP module and it facilitate the use of the electronic products in the USB interface.