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Design And Implementation Of The 2D-FFT Processor SOPC Based

Posted on:2014-11-17Degree:MasterType:Thesis
Country:ChinaCandidate:X J WangFull Text:PDF
GTID:2268330401953269Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Fast Fourier transform are widely used in digital signal processing (DSP) field, particularly, two-dimensional fast Fourier transform (2D-FFT) has important applications in spectrum and frequency domain analysis of the imaging technology, such as imaging processing and medical imaging in digital image watermarking, fingerprint recognition and synthetic aperture radar (SAR). With the increasing in the amount of required digital signal processing,2D-FFT performance and real-time requirements are also increased. Currently, the realization of2D-FFT algorithm almost limited to ASIC or DSP, but there is a certain lack in both implementations. To meet the application requirements and to make up for the lack of these two implementations, faster, good reconfigurable FPGA technology was adopted to implement the2D-FFT algorithm with parallel characteristics, which has become a hot research.The design chases hot research to explore the implementation of high-performance2D-FFT processor on FPGA board. The design of2D-FFT processing unit was integrated into an IP core, using custom components added to the SOPC system, and adding relevant system components, such as the Nios II soft core, SDRAM and so on, to achieve a scalable, extensible and Upgrades Available2D-FFT processing system. At the bottom of the FPGA design, the butterfly unit and CORDIC algorithm were adopted to realize FFT processing unit, and the ping-pong rearrangement was used to realize matrix transpose, which are the two key modules that combined into2D-FFT processing module. Finally, with reference to the latest Avalon bus standards to module package facilitating the use of custom components integrated into SOPC system.The system was wired on the Quartus Ⅱ8.0platform, and downloaded to the DE2development board of Altera for sample verification after simulation test by ModelSim the professional simulation tools of simulation test. Comparing the final results with Matlab processing results, it shows that this design was stable operation, fast speed, less resource-intensive, which has a very good practical prospect.
Keywords/Search Tags:SOPC, 2D-FFT, FPGA, Avalon Bus, IP Core
PDF Full Text Request
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