Fpga-based Digital Watermark Processing Device

In the past few years, with the rapid advance of communication technology and the popularity of Internet, digital information can be spread quickly via network. With the tools of multimedia software and the technology of network communication, digital products (audio, video, text and image) could be edited, modified, duplicated and distributed with no limitation. The problem of pirating digital products has become worse than ever The protection of digital products has gained more concern from governments. The digital watermark technology, which as an advanced technique of intellectual property protection, also has been paid more attention than before.Taking advantage of character of programmable circuit, a FPGA device which embedding watermark into digital image was proposed and realized in the article. The device was composed of hardware part and software part. The hardware part was composed of DCT2 (2-Dimension Discrete Cosine Transformation) hardware module, IDCT2 (Inverse 2-Dimension Cosine transformation) hardware module, and control signal module. The software part was used to embed watermark, communicate with PC, and write, refresh VGA image.In the article, the technology of watermark and the present and future of FPGA was introduced briefly. The classical watermark algorithms and the application field of watermark was discussed. In addition, the concept of SOPC design and the design flow were provided. The system hardware construct was discussed carefully. The experiments result and analysis were attatched in the paper.For compatibility of image compression standard JPEG, the DCT2 domain was used in the watermark system. Software of the watermark system divided the digital image into blocks. Then, these blocks were performed DCT2 transformation. Finally, watermark was embedded into digital image by taking the place of high frequency coefficients.For the purpose of enhancing the robustness of watermark, the chaos theory was introduced. Then, the watermark was processed by Arnold transformation. As a core of DCT2 hardware module and IDCT2 hardware module, the function Cosine was realized into hardware module with three kinds of different constructs. Furthermore, design concept and theory support of the three construct was formulated, and functional simulation results, analysis reports also were attached. Finally, two sets of digital watermark systems based on FPGA were given:one was DCT2 transformation, IDCT2 transformation realized by softcore NiosII; the other was DCT2 transformation, IDCT2 transformation compiled by hardware description language. What's more, compared with the two sets, the trial shows the fact that the digital watermark device based on hardware construct is quiet faster than the one based software construct. However, the previous is more complicated than the later. Debug time taken by the system based on hardware procession is longer than debug time by the one based on software procession.The hardware modules in the system were written in HDL (hardware description language) language. Altera software QuartusII was charge of compiling hardware modules. Altera software SOPC Builder was responsible for the hardware construct of system. Software NIOSⅡprovided the integrated development environment.