Research And Implementation Of Digital If Transceiver Using FPGA

SDR is the direction for the development of wireless communication System. It helps the communication system designer to focus on the digital processing of transceiver and care less about the implementation of circuits. At the aspect of digital signal processing, solutions include FPGA, DSP and ASIC. Considering the relative low power consumption and low cost, FPGA has become the first solution for many communication systems. Under these conditions, this paper will focus on the research and implementation of digital transceiver using FPGA with SDR technology.This paper mainly discusses the architecture and relevant hardware implementation of transmitter and receiver. First, this paper researches the architecture of transmitter and receiver in theory, in order to find the critical problems. Then, with deep insight in theory, relevant algorithms such as feedback control, feedback compensation and feed forward compensation, will be implemented on hardware using FPGA. Synchronization is the key point in digital communication systems; it is also discussed in this paper with an emphasis. With the research of several existing synchronization schemes, this paper designs and implements a new synchronization method and relevant architecture for receiver. At last, fully hardware test is done for the transceiver system. Test results show that the solution is feasible and meet the design requirements of digital transceiver system.The transmitter system is based on the Altera EP2C70F672C6 hardware platform and the receiver is based on the Altera EP2S180F1020C3 hardware platform. The transceiver system is implemented using Verilog HDL and Altera IP core in Quartus II 8.0 IDE. Before circuits implementation, all algorithms are simulated using MATLAB in theory. Based on the correct result of theory simulation, HDL code is pre-simulated and post-simulated using functional simulation tool and timing simulation tool in Quartus II 8.0 IDE. After the simulations, the transmitter and receiver can be downloaded into the hardware for circuit test. Through SignalTap in Quartus II 8.0 IDE and oscilloscope and spectrum analyzer, hardware test result can be obtained.