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Research On Synchronization Technology In Digital Communication System

Posted on:2020-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:Q RuanFull Text:PDF
GTID:2428330602952079Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
In the field of modern communication,the communication environment is complex and changeable,especially in military communication.Accurate synchronization technology is needed to ensure that the receiver correctly parses the transmitted information.Synchronization performance directly determines the performance of communication system.There is a large relative speed between the transmitter and receiver in high dynamic environment compared with conventional communication systems.Serious Doppler effect makes the received signal have a large carrier frequency shift,or even frequency shift change rate,which puts forward higher requirements for receiver synchronization technology.Therefore,the research on synchronization technology in digital communication system has important practical significance.Firstly,this paper studies and implements carrier synchronization and symbol synchronization in conventional communication systems,then discusses carrier synchronization technology in high dynamic environment.The main work and contributions of this paper are as follows: 1.Aiming at the project requirement,the design block diagram of UHF communication system based on TCM-8PSK is given.This paper studies the modulation principle of TCM-8PSK,and then selects the mapping method with the highest coding gain according to the principle of subset partition.2.Aiming at the carrier synchronization problem of TCM-8PSK signal in conventional communication system,the carrier synchronization method based on phase-locked loop is studied.Firstly,the working principles of carrier compensation,phase detector,loop filter and digital controlled oscillator in carrier synchronous loop are introduced.Then we simulate and analysis the influence of the noise bandwidth,the carrier frequency offset of the input signal and the signal-to-noise ratio of the input signal on the performance of the loop.Finally,the carrier synchronization loop is implemented on FPGA using Verilog HDL language,and the method of determining the loop parameters in the hardware design process is given in detail.3.Aiming at the symbolic synchronization of TCM-8PSK signal in conventional communication system,the symbolic synchronization method based on Gardner is studied.Firstly,the working principle of interpolation filter,timing error detection and interpolation controller in symbol synchronization loop is introduced.Then we give an interpolation filter with Farrow structure which is suitable for hardware implementation,and modify the Gardner timing error detection algorithm to apply to 8PSK modulation.Finally,the symbol synchronization loop is implemented on FPGA using Verilog HDL language,and the method of determining the loop parameters in the hardware design process is given in detail.4.Aiming at the difficulty of precise synchronization of Doppler frequency shift and Doppler frequency shift change rate in high dynamic environment,this paper first simulates and analyses the existing carrier acquisition methods,then proposes a carrier synchronization method based on minimum mean square error(MMSE)algorithm and Viterbi decoding assisted third-order phase-locked loop(PLL).Finally,the simulation results show that the proposed algorithm outperforms the traditional PLL algorithm about 4d B under the bit-toerror constraint of 510-.
Keywords/Search Tags:Carrier Synchronization, Symbol Synchronization, FPGA Implementation, Viterbi Decoding, Phase-Locked Loop
PDF Full Text Request
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