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Design Of High-Speed Digital Image Acquisition And Interface Based On FPGA

Posted on:2009-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:B Y ZhaoFull Text:PDF
GTID:2178360278464506Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
With the continual improvement of electronics, computer and image processing technology, vision measuring gets rapid development. Because of its non-contact, real-time, visible, automatic and intelligent, vision measuring is used in national economy, scientific research and national defense construction and other fields more and more. For the development of embedded image gathering and processing system, vision measuring applied more and more widely.In the paper, the research and development of the image acquisition and process of the mark's movement in the test and the interface design between framegrabber and camera or PC are dissertated, based on the vision measuring and the dynamic calibration of the 3-D dynamic parameters, such as tilt angle, pendulum center, motion track, motion speed, accelerated speed. After investigating the application and development status both home and aboard, we know it is necessary to satisfy the requirement of the high speed and real-time. Thus, a preliminary R&D of embedded real-time image acquisition and process or system is put forward based on the FPGA. Because the data is little after pre-process, serial communication is used between framegrabber and PC.The work is focused on the hardware design of the system, the logic design of all modules and software programming of the image processing. EP2C20Q240C8 from Altera is used as the core device in the design, and the image from high-speed digital camera CA-D6 is the target, which is used to acquisition and process. In the design of the hardware, except the selection of the key chips, the design of all function modules also includes the interface between FPGA and camera and the interface between FPGA and PC. The program design includes camera control module and image acquisition module with Verilog HDL, and image processing with C language.The system is specialized in two aspects: one is the high-speed of the devices and the code-simplification, the other lies in lower consumption and high cost-effective.
Keywords/Search Tags:image acquisition, FPGA, serial communication, Verilog HDL
PDF Full Text Request
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