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Research And Design Of Serial Data Switching System Based On FPGA And W5500

Posted on:2018-03-13Degree:MasterType:Thesis
Country:ChinaCandidate:K K GaoFull Text:PDF
GTID:2348330518966977Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the continuous development of Ethernet communication technology,the speed and security of network communication are getting higher and higher,and the application of Ethernet communication technology is more and more extensive.However,due to the complexity of the Ethernet protocol,the actual application of the system can not better meet the real-time needs.FPGA and other programmable logic devices make the rapid development of Ethernet protocol transmission real-time higher,with the hardware Ethernet protocol stack technology is getting higher and higher,now based on FPGA-based Ethernet protocol processing into a research hotspot.In this thesis,the FPGA platform,Candence software and Verilog HDL language design to achieve an efficient FPGA and W5500 through the Ethernet server control serial data switching system,the use of FPGA serial port protocol conversion circuit in the TCP/IP protocol stack to initialize The corresponding channel switching,improve system reusability,for further research to provide a more convenient platform.The hardware part mainly includes five parts such as level conversion circuit,channel switching circuit,Ethernet protocol conversion circuit,network port transmission circuit and system power supply circuit.It provides a way of adding and using a variety of level conversion for protocol conversion,As long as the level of transmission can be easily added to the protocol conversion circuit to run and debug.The protocol conversion circuit is responsible for the implementation of the main algorithm,through the hardware form to achieve the entire design.Full hardware TCP/IP protocol stack protocol transmission,can maximize the transmission efficiency,to achieve transparent data transmission.The software part mainly includes TCP/IP protocol stack initialization and link switch two parts.To achieve the server and FPGA control under the TCP/IP protocol stack between the Ethernet communication design,such as TCP/IP,UDP algorithm design,embedded Ethernet chip initialization and serial port switching procedures to achieve.The whole design was developed in the software environment of Candence and Quartus II 13.0 and ISE 14.7.It was implemented on the hardware platform of independent design.Qsim and Modelsim of ISE 14.7 were used as auxiliary analysis software in the software simulation process.Through the analysis of simulation results and hardware circuit debugging,you can verify the design of the hardware and software aspects of the function have reached the expected requirements.
Keywords/Search Tags:FPGA, Verilog HDL, W5500, Serial communication
PDF Full Text Request
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