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Design Of CMOS Image Acquisition And Processing System Based On FPGA

Posted on:2019-04-01Degree:MasterType:Thesis
Country:ChinaCandidate:Q ChenFull Text:PDF
GTID:2428330548989464Subject:engineering
Abstract/Summary:PDF Full Text Request
With the increase of the amount of image processing data and the demand for real-time image processing in practical applications,the problem of image processing speed is restricting the further development of image processing technology.For the characteristics of large amount of image data,this paper chooses FPGA as the system processor to improve the speed of image acquisition and processing and meet the requirements of real-time image processing.Based on a large number of image acquisition and processing designs at home and abroad,this paper builds an FPGA-based CMOS image acquisition and processing system.The system adopts Altera's Cyclone IV EP4CE15F17C8 as the control chip,adopts Omni Vision's OV7725 type image sensor to capture external images,uses HY57V283220T-6 chip to achieve image data buffering,and uses CY7C68013 A chip to implement USB transfer control.The system mainly includes four aspects of design.In the image acquisition aspect,the OV7725 was initialized and the data was effectively collected and stitched.In the image cache,the SDRAM controller design is completed by modifying the port.In the image display aspect,two types of image display methods are adopted: LCD direct display and upper computersystem display.In the aspect of image processing,call the Altera shift register IP core to complete the 3×3 filter window array design.A sorting algorithm is used to reduce the number of operations and a shift operation is used to solve floating-point arithmetic in the image processing algorithm to increase the speed of operation.The FPGA design and implementation of image median filtering algorithm,Sobel edge detection algorithm and image overlay alpha algorithm are carried out in detail.This paper uses Verilog HDL to complete the circuit design of each module in the Quartus II environment.Signal Tap II is used for real-time signal acquisition and analysis,and each module is verified using Modelsim simulation analysis.Finally,the system is tested on an FPGA-based hardware platform.The test results show that the image acquisition and processing system design is implemented,and the advantage of parallel processing of a large amount of image data by the FPGA is well utilized.
Keywords/Search Tags:image acquisition, image processing, FPGA, OV7725, Verilog HDL
PDF Full Text Request
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