The Application Of FPGA In Real-time Image Acquisition And Processing

With the development of image processing technology, processing and analysis of image data to obtain the target information is a hot topic of contemporary scientific research and application. In this context, for different applications, there is image processing system for a variety of different image processing algorithms and hardware implementation platform. Among them, in demanding real-time video image processing system, image acquisition and processing often requires the same time. So, data throughput and interface processing speed requirements are very demanding, based on serial execution mode processor such as ARM and PC, rely on the control of the software will encounter a problem, difficult to reach competent.To address this problem, in this paper, the FPGA chip more and more attention as a controller, to build an image information acquisition and processing, and processing of the image displayed by the LCD display real-time image processing system. The content and results of the article is mainly reflected in the following areas:(1) through a comparative analysis of the advantages and disadvantages of different image sensor images for image acquisition, the system will eventually choose CMOS image sensor to capture images, and image quality is comparable to CCD image sensor in the case of low-cost, but does not require the AD and DA conversion, directly to get digital image, and simplify the hardware structure of the system. The two ping-pong operation of the SRAM memory to complete the three processes on the real-time image processing system timing reasonable arrangements to ensure that the system does not overlap due to the timing between the cross which led to the blocking of the image data transmission, interruption or loss of image data, etc..(2) In order to achieve the purpose of real-time image processing, module requires fast processing speed, and therefore the realization of part of the system median filter algorithm uses a lot of parallel structure, as much as possible to reduce the data comparisons. Inserting register with timely, reasonable segmentation of the use of assembly line work processes, greatly improve the operating frequency of the module. This approach into full play the advantages of the FPGA.(3)The system applied to the bar code reading equipment, use the system to collect non-destructive and clear high images, getting image data for follow-up to bar decoding device.The coding of the entire system uses the Verilog hardware description language, under the Altera Quartus Ⅱ project, in accordance with the FPGA design flow to manage the design, and complete all levels simulation using Modelsim, and finally, observe the actual work effect on the prototype. Practice has proved that the system has good flexibility and high speed.